Product Overview
The Skyworks Solutions Si510/511 Crystal Oscillator (XO) is an advanced, IC-based frequency generation solution utilizing DSPLL technology. It offers any frequency output from 100 kHz to 250 MHz using a single fixed crystal, eliminating the need for multiple crystals for different frequencies. This approach enhances reliability, mechanical robustness, and stability. The Si510/511 provides superior supply noise rejection, simplifying low-jitter clock generation in noisy environments. It is factory-configurable for various user specifications, including frequency, supply voltage, output format, and stability, with short lead times and no NRE charges.
Product Attributes
- Brand: Skyworks Solutions
- Technology: DSPLL
- Certifications: Pb-free, RoHS compliant
- Package Options: 5 x 7 mm, 3.2 x 5 mm, 2.5 x 3.2 mm
- Operating Temperature: 40 to 85 C
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | |
| VDD | 2.5 V option | 2.25 | 2.5 | 2.75 | V | ||
| VDD | 1.8 V option | 1.71 | 1.8 | 1.89 | V | ||
| Supply Current | IDD | CMOS, 100 MHz, single-ended | 21 | 26 | mA | ||
| Supply Current | IDD | LVDS (output enabled) | 19 | 23 | mA | ||
| Supply Current | IDD | LVPECL (output enabled) | 39 | 43 | mA | ||
| Supply Current | IDD | HCSL (output enabled) | 41 | 44 | mA | ||
| Supply Current | IDD | Tristate (output disabled) | 18 | mA | |||
| OE Input Voltage | VIH | OE "1" Setting | 0.80 x VDD | V | See Note | ||
| VIL | OE "0" Setting | 0.20 x VDD | V | See Note | |||
| OE Internal Resistor | RI | 45 | k | *Note: Active high and active low polarity OE options available. Active high option includes an internal pull-up. Active low option includes an internal pull-down. See ordering information on page 14. | |||
| Operating Temperature | TA | 40 | 85 | C | |||
| Nominal Frequency | FO | CMOS, Dual CMOS | 0.1 | 212.5 | MHz | ||
| FO | LVDS/LVPECL/HCSL | 0.1 | 250 | MHz | |||
| Total Stability | Frequency Stability Grade C | 30 | +30 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | ||
| Frequency Stability Grade B | 50 | +50 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | |||
| Frequency Stability Grade A | 100 | +100 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | |||
| Temperature Stability | Frequency Stability Grade C | 20 | +20 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | ||
| Frequency Stability Grade B | 25 | +25 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | |||
| Frequency Stability Grade A | 50 | +50 | ppm | *Note: Total stability includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 oC. | |||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 10 | ms | |||
| Disable Time | TD | FO 10 MHz | 5 | s | |||
| TD | FO < 10 MHz | 40 | s | ||||
| Enable Time | TE | FO 10 MHz | 20 | s | |||
| TE | FO < 10 MHz | 60 | s | ||||
| CMOS Output Rise/Fall Time | TR/TF | 0.1 to 212.5 MHz, CL = 15 pF | 0.45 | 0.8 | 1.2 | ns | |
| TR/TF | 0.1 to 212.5 MHz, CL = no load | 0.3 | 0.6 | 0.9 | ns | ||
| LVPECL Output Rise/Fall Time | TR/TF | 100 | 565 | ps | |||
| HCSL Output Rise/Fall Time | TR/TF | 100 | 470 | ps | |||
| LVDS Output Rise/Fall Time | TR/TF | 350 | 800 | ps | |||
| Period Jitter (RMS) | JPRMS | 10k samples | 1.3 | ps | |||
| JPPKPK | 10k samples | 11 | ps | ||||
| J | 1.875 MHz to 20 MHz integration bandwidth (brickwall) | 0.31 | 0.5 | ps | |||
| Phase Jitter (RMS) | J | 12 kHz to 20 MHz integration bandwidth (brickwall) | 0.8 | 1.0 | ps | ||
| Phase Noise | N | 156.25 MHz @ 100 Hz | 86 | dBc/Hz | |||
| N | 156.25 MHz @ 1 kHz | 109 | dBc/Hz | ||||
| N | 156.25 MHz @ 10 kHz | 116 | dBc/Hz | ||||
| N | 156.25 MHz @ 100 kHz | 123 | dBc/Hz | ||||
| N | 156.25 MHz @ 1 MHz | 136 | dBc/Hz | ||||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 10 kHz sinusoidal noise | 3.0 | ps | 3 |
Applications
- SONET/SDH/OTN
- Gigabit Ethernet
- Fibre Channel/SAS/SATA
- PCI Express
- 3G-SDI/HD-SDI/SDI
- Telecom
- Switches/routers
- FPGA/ASIC clock generation
2411041604_SKYWORKS-510QCA-CAAG_C7024293.pdf
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