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quality DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions factory
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quality DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions factory
quality DSPLL technology based crystal oscillator SKYWORKS 510SAA-CAAG for stable and frequency generation solutions factory
>
Specifications
Frequency Stability:
±50ppm
Output Type:
-
Voltage - Supply:
1.8V
Frequency:
212.5MHz
Operating Temperature:
-40℃~+85℃
Mfr. Part #:
510SAA-CAAG
Package:
SMD7050-6P
Key Attributes
Model Number: 510SAA-CAAG
Product Description

Product Overview

The Skyworks Si510/511 Crystal Oscillator (XO) is an advanced, IC-based frequency generation solution utilizing DSPLL technology. It offers any frequency output from 100 kHz to 250 MHz using a single fixed crystal, eliminating the need for multiple crystals for different frequencies. This approach enhances reliability, mechanical robustness, and stability while providing superior supply noise rejection for low-jitter clock generation in noisy environments. The Si510/511 is factory-configurable for various user specifications, including frequency, supply voltage, output format, and stability, with short lead times and no NRE charges.

Product Attributes

  • Brand: Skyworks Solutions, Inc.
  • Technology: DSPLL
  • Certifications: Pb-free, RoHS compliant
  • Package Options: 5 x 7 mm, 3.2 x 5 mm, 2.5 x 3.2 mm
  • Lead Times: 2 to 4 weeks

Technical Specifications

ParameterSymbolTest ConditionMinTypMaxUnit
Operating Specifications
Supply VoltageVDD3.3 V option2.973.33.63V
2.5 V option2.252.52.75V
1.8 V option1.711.81.89V
Supply CurrentIDDCMOS, 100 MHz, single-ended2126mA
LVDS (output enabled)1923mA
LVPECL (output enabled)3943mA
HCSL (output enabled)4144mA
Tristate (output disabled)18mA
Operating TemperatureTA4085C
Output Clock Frequency Characteristics
Nominal FrequencyFOCMOS, Dual CMOS0.1212.5MHz
LVDS/LVPECL/HCSL0.1250MHz
Total StabilityFrequency Stability Grade C30+30ppm
Frequency Stability Grade B50+50ppm
Frequency Stability Grade A100+100ppm
Startup TimeTSUMinimum VDD until output frequency (FO) within specification10ms
Disable TimeTDFO 10 MHz5s
FO < 10 MHz40s
Enable TimeTEFO 10 MHz20s
FO < 10 MHz60s
Output Clock Levels and Symmetry
CMOS Output Logic HighVOH0.85 x VDDV
CMOS Output Logic LowVOL0.15 x VDDV
CMOS Output Rise/Fall Time (20 to 80% VDD)TR/TF0.1 to 212.5 MHz, CL = 15 pF0.450.81.2ns
LVPECL Output Rise/Fall Time (20 to 80% VDD)TR/TF100565ps
HCSL Output Rise/Fall Time (20 to 80% VDD)TR/TF100470ps
LVDS Output Rise/Fall Time (20 to 80% VDD)TR/TF350800ps
Duty CycleDCAll formats485052%
Output Clock Jitter and Phase Noise (LVPECL)
Period Jitter (RMS)JPRMS10k samples1.3ps
Period Jitter (Pk-Pk)JPPKPK10k samples11ps
Phase Jitter (RMS)J1.875 MHz to 20 MHz integration bandwidth (brickwall)0.310.5ps
12 kHz to 20 MHz integration bandwidth (brickwall)0.81.0ps
Phase Noise, 156.25 MHzN100 Hz86dBc/Hz
1 kHz109dBc/Hz
10 kHz116dBc/Hz
100 kHz123dBc/Hz
1 MHz136dBc/Hz
Additive RMS Jitter Due to External Power Supply NoiseJPSR10 kHz sinusoidal noise3.0ps

2411041604_SKYWORKS-510SAA-CAAG_C7024298.pdf

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