Skyworks Si510/511 Crystal Oscillator (XO)
The Si510/511 XO utilizes Skyworks Solutions' advanced DSPLL technology to provide any frequency from 100 kHz to 250 MHz. Unlike traditional XOs requiring a different crystal for each output frequency, this solution uses one fixed crystal and a proprietary DSPLL synthesizer. This IC-based approach enhances reliability, mechanical robustness, and stability. It also offers superior supply noise rejection, simplifying low jitter clock generation in noisy environments. Crystal ESR and DLD are individually production-tested for guaranteed performance and reliability. The Si510/511 is factory-configurable for various user specifications, including frequency, supply voltage, output format, output enable polarity, and stability, eliminating long lead times and NRE charges.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL
- Certifications: Pb-free, RoHS compliant
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
| Operating Specifications | ||||||
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | ||
| 1.8 V option | 1.71 | 1.8 | 1.89 | V | ||
| Supply Current | IDD | CMOS, 100 MHz, single-ended | 21 | 26 | mA | |
| LVDS (output enabled) | 19 | 23 | mA | |||
| LVPECL (output enabled) | 39 | 43 | mA | |||
| HCSL (output enabled) | 41 | 44 | mA | |||
| Tristate (output disabled) | 18 | mA | ||||
| Operating Temperature | TA | 40 | 85 | oC | ||
| Output Clock Frequency Characteristics | ||||||
| Nominal Frequency | FO | CMOS, Dual CMOS | 0.1 | 212.5 | MHz | |
| LVDS/LVPECL/HCSL | 0.1 | 250 | MHz | |||
| Total Stability | Frequency Stability Grade C | 30 | +30 | ppm | ||
| Frequency Stability Grade B | 50 | +50 | ppm | |||
| Frequency Stability Grade A | 100 | +100 | ppm | |||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 10 | ms | ||
| Disable Time | TD | FO 10 MHz | 5 | s | ||
| FO < 10 MHz | 40 | s | ||||
| Enable Time | TE | FO 10 MHz | 20 | s | ||
| FO < 10 MHz | 60 | s | ||||
| Output Clock Levels and Symmetry | ||||||
| CMOS Output Logic High | VOH | 0.85 x VDD | V | |||
| CMOS Output Logic Low | VOL | 0.15 x VDD | V | |||
| CMOS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 0.1 to 212.5 MHz, CL = 15 pF | 0.45 | 0.8 | 1.2 | ns |
| LVPECL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 | 565 | ps | ||
| HCSL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 | 470 | ps | ||
| LVDS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 350 | 800 | ps | ||
| Duty Cycle | DC | All formats | 48 | 50 | 52 | % |
| Output Clock Jitter and Phase Noise (LVPECL) | ||||||
| Period Jitter (RMS) | JPRMS | 10k samples | 1.3 | ps | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 11 | ps | ||
| Phase Jitter (RMS) | J | 1.875 MHz to 20 MHz integration bandwidth (brickwall) | 0.31 | 0.5 | ps | |
| 12 kHz to 20 MHz integration bandwidth (brickwall) | 0.8 | 1.0 | ps | |||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 10 kHz sinusoidal noise | 3.0 | ps | ||
2411041604_SKYWORKS-511JBA-BBAG_C7024341.pdf
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