Skyworks Solutions Si510/511 Crystal Oscillator (XO)
Product Overview
The Skyworks Solutions Si510/511 Crystal Oscillator (XO) leverages advanced DSPLL technology to provide any frequency from 100 kHz to 250 MHz. Unlike traditional XOs requiring a unique crystal for each frequency, this IC-based solution utilizes a single fixed crystal and a proprietary DSPLL synthesizer. This approach enhances reliability, mechanical robustness, and stability while offering superior supply noise rejection, simplifying low-jitter clock generation in noisy environments. The Si510/511 is factory-configurable for user-specific requirements, including frequency, supply voltage, output format, output enable polarity, and stability, eliminating long lead times and NRE charges associated with custom oscillators. Crystal ESR and DLD are individually production-tested to guarantee performance and reliability.
Product Attributes
- Brand: Skyworks Solutions
- Technology: DSPLL
- Compliance: Pb-free, RoHS compliant
- Packaging: Industry standard 5 x 7 mm, 3.2 x 5 mm, and 2.5 x 3.2 mm packages
- Certifications: Compliant with JEDEC J-STD-020E
Applications
- SONET/SDH/OTN
- Gigabit Ethernet
- Fibre Channel/SAS/SATA
- PCI Express
- 3G-SDI/HD-SDI/SDI
- Telecom
- Switches/routers
- FPGA/ASIC clock generation
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Operating Specifications | ||||||
| Supply Voltage (3.3 V option) | VDD | 2.97 | 3.3 | 3.63 | V | |
| Supply Voltage (2.5 V option) | VDD | 2.25 | 2.5 | 2.75 | V | |
| Supply Voltage (1.8 V option) | VDD | 1.71 | 1.8 | 1.89 | V | |
| Supply Current (CMOS, 100 MHz, single-ended) | IDD | 21 | 26 | mA | ||
| Supply Current (LVDS, output enabled) | IDD | 19 | 23 | mA | ||
| Supply Current (LVPECL, output enabled) | IDD | 39 | 43 | mA | ||
| Supply Current (HCSL, output enabled) | IDD | 41 | 44 | mA | ||
| Supply Current (Tristate, output disabled) | IDD | 18 | mA | |||
| Operating Temperature | TA | 40 | 85 | C | ||
| Output Clock Frequency Characteristics | ||||||
| Nominal Frequency (CMOS, Dual CMOS) | FO | 0.1 | 212.5 | MHz | ||
| Nominal Frequency (LVDS/LVPECL/HCSL) | FO | 0.1 | 250 | MHz | ||
| Total Stability (Grade C) | 30 | +30 | ppm | |||
| Total Stability (Grade B) | 50 | +50 | ppm | |||
| Total Stability (Grade A) | 100 | +100 | ppm | |||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 10 | ms | ||
| Disable Time (FO 10 MHz) | TD | 5 | s | |||
| Disable Time (FO < 10 MHz) | TD | 40 | s | |||
| Enable Time (FO 10 MHz) | TE | 20 | s | |||
| Enable Time (FO < 10 MHz) | TE | 60 | s | |||
| Output Clock Levels and Symmetry | ||||||
| CMOS Output Logic High | VOH | 0.85 x VDD | V | |||
| CMOS Output Logic Low | VOL | 0.15 x VDD | V | |||
| CMOS Output Rise/Fall Time (20 to 80% VDD, CL = 15 pF) | TR/TF | 0.1 to 212.5 MHz | 0.45 | 0.8 | 1.2 | ns |
| LVPECL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 MHz | 565 | ps | ||
| HCSL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 MHz | 470 | ps | ||
| LVDS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 350 | 800 | ps | ||
| Duty Cycle | DC | All formats | 48 | 50 | 52 | % |
| Output Clock Jitter and Phase Noise (LVPECL) | ||||||
| Period Jitter (RMS) | JPRMS | 10k samples | 1.3 | ps | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 11 | ps | ||
| Phase Jitter (RMS) (1.875 MHz to 20 MHz) | J | (brickwall) | 0.31 | 0.5 | ps | |
| Phase Jitter (RMS) (12 kHz to 20 MHz) | J | (brickwall) | 0.8 | 1.0 | ps | |
| Output Clock Jitter and Phase Noise (LVDS) | ||||||
| Period Jitter (RMS) | JPRMS | 10k samples | 2.1 | ps | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 18 | ps | ||
| Phase Jitter (RMS) (1.875 MHz to 20 MHz) | J | (brickwall) | 0.25 | 0.55 | ps | |
| Phase Jitter (RMS) (12 kHz to 20 MHz) | J | (brickwall) | 0.8 | 1.0 | ps | |
| Output Clock Jitter and Phase Noise (HCSL) | ||||||
| Period Jitter (RMS) | JPRMS | 10k samples | 1.2 | ps | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 11 | ps | ||
| Phase Jitter (RMS) (1.875 MHz to 20 MHz) | J | (brickwall) | 0.25 | 0.30 | ps | |
| Phase Jitter (RMS) (12 kHz to 20 MHz) | J | (brickwall) | 0.8 | 1.0 | ps | |
| Output Clock Jitter and Phase Noise (CMOS, Dual CMOS) | ||||||
| Phase Jitter (RMS) (1.875 MHz to 20 MHz) | J | (brickwall) | 0.25 | 0.35 | ps | |
| Phase Jitter (RMS) (12 kHz to 20 MHz) | J | (brickwall) | 0.8 | 1.0 | ps | |
| Environmental Compliance and Package Information | ||||||
| Mechanical Shock | MIL-STD-883, Method 2002 | |||||
| Mechanical Vibration | MIL-STD-883, Method 2007 | |||||
| Solderability | MIL-STD-883, Method 2003 | |||||
| Gross and Fine Leak | MIL-STD-883, Method 1014 | |||||
| Resistance to Solder Heat | MIL-STD-883, Method 2036 | |||||
| Contact Pads | Gold over Nickel | |||||
| Thermal Characteristics | ||||||
| Thermal Resistance Junction to Ambient (CLCC) | JA | Still air | 110 | C/W | ||
| Thermal Resistance Junction to Ambient (2.5x3.2mm) | JA | Still air | 164 | C/W | ||
| Absolute Maximum Ratings | ||||||
| Maximum Operating Temperature | TAMAX | 85 | C | |||
| Storage Temperature | TS | 55 | 125 | C | ||
| Supply Voltage | VDD | 0.5 | 3.8 | V | ||
| Input Voltage (any input pin) | VI | 0.5 | VDD + 0.3 | V | ||
| ESD Sensitivity (HBM, per JESD22-A114) | HBM | 2 | kV | |||
| Soldering Temperature (Pb-free profile) | TPEAK | 260 | C | |||
| Soldering Temperature Time at TPEAK (Pb-free profile) | TP | 20 | 40 | sec | ||
Package Dimensions
Available in industry-standard 5 x 7 mm, 3.2 x 5 mm, and 2.5 x 3.2 mm packages.
Ordering Information
The Si510/511 is factory-configurable. Specific device configurations are programmed at time of shipment. Configurations can be specified using the Part Number Configuration chart. A web browser-based part number configuration utility is available at www.skyworksinc.com/products/timing-oscillators.
2411041604_SKYWORKS-511BCA100M000BAG_C17618630.pdf
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