Product Overview
The Skyworks Si510/511 Crystal Oscillator (XO) leverages advanced DSPLL technology to provide any frequency from 100 kHz to 250 MHz using a single fixed crystal. This IC-based approach offers enhanced reliability, improved mechanical robustness, and excellent stability. It features superior supply noise rejection, simplifying low jitter clock generation in noisy environments. Crystal ESR and DLD are individually production-tested for guaranteed performance and reliability. The Si510/511 is factory-configurable for various user specifications, including frequency, supply voltage, output format, output enable polarity, and stability, eliminating long lead times and NRE charges associated with custom oscillators.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL
- Certifications: Pb-free, RoHS compliant
- Package Options: 5 x 7 mm, 3.2 x 5 mm, 2.5 x 3.2 mm
- Operating Temperature: 40 to 85 C
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | |||
| 1.8 V option | 1.71 | 1.8 | 1.89 | V | |||
| Supply Current | IDD | CMOS, 100 MHz, single-ended | 21 | 26 | mA | ||
| LVDS (output enabled) | 19 | 23 | mA | ||||
| LVPECL (output enabled) | 39 | 43 | mA | ||||
| HCSL (output enabled) | 41 | 44 | mA | ||||
| Tristate (output disabled) | 18 | mA | |||||
| OE "1" Setting | VIH | See Note | 0.80 x VDD | V | Active high and active low polarity OE options available. Active high option includes an internal pull-up. Active low option includes an internal pull-down. | ||
| OE "0" Setting | VIL | See Note | 0.20 x VDD | V | |||
| OE Internal Pull-Up/Pull-Down Resistor | RI | 45 | k | ||||
| Operating Temperature | TA | 40 | 85 | C | |||
| Nominal Frequency | FO | CMOS, Dual CMOS | 0.1 | 212.5 | MHz | ||
| LVDS/LVPECL/HCSL | 0.1 | 250 | MHz | ||||
| Total Stability* | Frequency Stability Grade C | 30 | +30 | ppm | Includes initial accuracy, operating temperature, supply voltage change, load change, shock and vibration (not under operation), and 10 years aging at 40 C. | ||
| Frequency Stability Grade B | 50 | +50 | ppm | ||||
| Frequency Stability Grade A | 100 | +100 | ppm | ||||
| Temperature Stability | Frequency Stability | Grade C | 20 | +20 | ppm | ||
| Grade B | 25 | +25 | ppm | ||||
| Grade A | 50 | +50 | ppm | ||||
| Startup Time | TSU | Minimum VDD until output frequency (FO) within specification | 10 | ms | |||
| Disable Time | TD | FO 10 MHz | 5 | s | |||
| FO < 10 MHz | 40 | s | |||||
| Enable Time | TE | FO 10 MHz | 20 | s | |||
| FO < 10 MHz | 60 | s | |||||
| CMOS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 0.1 to 212.5 MHz, CL = 15 pF | 0.45 | 0.8 | 1.2 | ns | |
| 0.1 to 212.5 MHz, CL = no load | 0.3 | 0.6 | 0.9 | ns | |||
| LVPECL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 MHz 250 MHz | 100 | 565 | ps | ||
| HCSL Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 MHz 250 MHz | 100 | 470 | ps | ||
| LVDS Output Rise/Fall Time (20 to 80% VDD) | TR/TF | 100 MHz 250 MHz | 350 | 800 | ps | ||
| Duty Cycle | DC | All formats | 48 | 50 | 52 | % | |
| Period Jitter (RMS) | JPRMS | 10k samples | 1.3 | ps | LVPECL | ||
| Period Jitter (Pk-Pk) | JPPKPK | 10k samples | 11 | ps | LVPECL | ||
| Phase Jitter (RMS) | J | 1.875 MHz to 20 MHz integration bandwidth (brickwall) | 0.31 | 0.5 | ps | LVPECL | |
| 12 kHz to 20 MHz integration bandwidth (brickwall) | 0.8 | 1.0 | ps | LVPECL | |||
| Phase Noise | N | 156.25 MHz @ 100 Hz | 86 | dBc/Hz | LVPECL | ||
| 156.25 MHz @ 1 kHz | 109 | dBc/Hz | LVPECL | ||||
| 156.25 MHz @ 10 kHz | 116 | dBc/Hz | LVPECL | ||||
| 156.25 MHz @ 100 kHz | 123 | dBc/Hz | LVPECL | ||||
| 156.25 MHz @ 1 MHz | 136 | dBc/Hz | LVPECL | ||||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 10 kHz sinusoidal noise | 3.0 | ps | LVPECL | ||
| Additive RMS Jitter Due to External Power Supply Noise | JPSR | 100 kHz sinusoidal noise | ps | LVPECL |
2411041604_SKYWORKS-510PCB-ABAG_C7187227.pdf
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