Skyworks Solutions Si535/Si536 Ultra Low Jitter Crystal Oscillator (XO)
Product Overview
The Skyworks Solutions Si535/Si536 is an Ultra Low Jitter Crystal Oscillator (XO) that leverages advanced DSPLL circuitry to deliver high-speed differential clock frequencies with exceptionally low jitter. Unlike traditional XOs requiring multiple crystals for different frequencies, this IC-based solution utilizes a single fixed crystal to generate a wide range of output frequencies, enhancing frequency stability and reliability. Its DSPLL clock synthesis offers superior supply noise rejection, making it ideal for generating low jitter clocks in noisy communication system environments. The Si535/536 is factory programmed at the time of shipment, eliminating long lead times associated with custom oscillators. It is designed for applications such as 10/40/100G data centers, 10G Ethernet switches/routers, Fibre Channel/SAS/storage, enterprise servers, networking, and telecommunications.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL circuitry
- Package: Industry-standard 5 x 7 mm
- Compliance: Pb-free/RoHS-compliant
- Contact Pads: Gold over Nickel
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit |
|---|---|---|---|---|---|---|
| Recommended Operating Conditions | ||||||
| Supply Voltage (3.3 V option) | VDD | 2.97 | 3.3 | 3.63 | V | |
| Supply Voltage (2.5 V option) | VDD | 2.25 | 2.5 | 2.75 | V | |
| Supply Current (Output enabled, LVPECL) | IDD | 111 | 121 | mA | ||
| Supply Current (Output enabled, LVDS) | IDD | 90 | 98 | mA | ||
| Supply Current (Tristate mode) | IDD | 60 | 75 | mA | ||
| Output Enable (VIH) | OE | 0.75 x VDD | V | |||
| Output Enable (VIL) | OE | 0.5 | V | |||
| Operating Temperature Range | TA | 40 | 85 | C | ||
| CLK Output Frequency Characteristics | ||||||
| Nominal Frequency | fO | LVPECL/LVDS | 100 | 312.5 | MHz | |
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | ||
| Temperature Stability (20 ppm option) | 7 | +7 | ppm | |||
| Temperature Stability (7 ppm option) | 20 | +20 | ppm | |||
| Aging (Frequency drift over first year) | fa | 3 | ppm | |||
| Aging (Frequency drift over 20 year life) | fa | 10 | ppm | |||
| Total Stability (Temp stability = 20 ppm) | 31.5 | ppm | ||||
| Total Stability (Temp stability = 7 ppm) | 20 | ppm | ||||
| Powerup Time | tOSC | TA = 40C +85C | 10 | ms | ||
| CLK Output Levels and Symmetry | ||||||
| LVPECL Mid-level | VO | 50 to VDD 2.0 V | VDD 1.42 | VDD 1.25 | V | |
| LVPECL Swing (diff) | VOD | 1.1 | 1.9 | VPP | ||
| LVPECL Swing (Single-ended) | VSE | 0.55 | 0.95 | VPP | ||
| LVDS Mid-level | VO | Rterm = 100 (differential) | 1.125 | 1.20 | 1.275 | V |
| LVDS Swing (diff) | VOD | 0.5 | 0.7 | 0.9 | VPP | |
| Rise/Fall time (20/80%) | tR, tF | 350 | ps | |||
| Symmetry (duty cycle) | SYM | Differential | 45 | 55 | % | |
| CLK Output Phase Jitter | ||||||
| Phase Jitter* (RMS) (10 kHz to 1 MHz) | J | data center | 0.19 | 0.35 | ps | |
| Phase Jitter* (RMS) (12 kHz to 20 MHz) | J | brickwall | 0.25 | 0.40 | ps | |
| CLK Output Period Jitter | ||||||
| Period Jitter* (RMS) | JPER | N = 1000 cycles | 2 | ps | ||
| Period Jitter* (Peak-to-Peak) | JPER | N = 1000 cycles | 14 | ps | ||
| Environmental Compliance | ||||||
| Mechanical Shock | MIL-STD-883, Method 2002 | Meets Requirements | ||||
| Mechanical Vibration | MIL-STD-883, Method 2007 | Meets Requirements | ||||
| Solderability | MIL-STD-883, Method 2003 | Meets Requirements | ||||
| Gross & Fine Leak | MIL-STD-883, Method 1014 | Meets Requirements | ||||
| Resistance to Solder Heat | MIL-STD-883, Method 2036 | Meets Requirements | ||||
| Moisture Sensitivity Level | J-STD-020, MSL1 | MSL1 | ||||
| Thermal Characteristics (Typical values TA = 25 C, VDD = 3.3 V) | ||||||
| Thermal Resistance Junction to Ambient | JA | Still Air | 84.6 | C/W | ||
| Thermal Resistance Junction to Case | JC | Still Air | 38.8 | C/W | ||
| Ambient Temperature | TA | 40 | 85 | C | ||
| Junction Temperature | TJ | 125 | C | |||
| Absolute Maximum Ratings | ||||||
| Maximum Operating Temperature | TAMAX | 85 | C | |||
| Supply Voltage, 2.5/3.3 V Option | VDD | 0.5 | +3.8 | V | ||
| Input Voltage (any input pin) | VI | 0.5 | VDD + 0.3 | V | ||
| Storage Temperature | TS | 55 | +125 | C | ||
| ESD Sensitivity (HBM, per JESD22-A114) | ESD | 2500 | V | |||
| Soldering Temperature (Pb-free profile) | TPEAK | 260 | C | |||
| Soldering Temperature Time @ TPEAK (Pb-free profile) | tP | 2040 | seconds | |||
Pin Descriptions
| Pin | Symbol | Function |
|---|---|---|
| Si535 Series | ||
| 1 | NC | No connection |
| 2 | OE | Output enable (0 = clock output disabled, 1 = clock output enabled) |
| 3 | GND | Electrical and Case Ground |
| 4 | CLK+ | Oscillator Output |
| 5 | CLK | Complementary Output |
| 6 | VDD | Power Supply Voltage |
| Si536 Series | ||
| 1 | OE | Output enable (0 = clock output disabled, 1 = clock output enabled) |
| 2 | NC | No connection |
| 3 | GND | Electrical and Case Ground |
| 4 | CLK+ | Oscillator Output |
| 5 | CLK | Complementary output |
| 6 | VDD | Power Supply Voltage |
Ordering Information
The Si535/536 XO series is available in an industry-standard, RoHS compliant, 6-pad, 5 x 7 mm package. The Si536 Series features an alternate OE pinout (pin #1) compared to the Si535 Series (pin #2).
Part Number Convention: 53x [Freq] [Option1] [Option2] [Temp] [Packaging]
Frequency Range: 100 MHz to 312.5 MHz
Available Frequencies (examples): 100.000 MHz (100M000), 156.250 MHz (156M250), 312.500 MHz (312M500)
Option Codes:
- VDD: 3 (3.3 V), E (2.5 V)
- Output Format: A (LVPECL), B (LVDS)
- Output Enable Polarity: High (default)
- Temperature Stability (ppm, max, ): B (20), C (7)
- Total Stability (ppm, max, ): B (31.5), C (20)
- Operating Temp Range (C): G (-40 to +85 C)
- Packaging: D (Tape & Reel), G (Coil Tape)
Example Part Number: 535AB156M250DGR (5 x 7 XO, 156.250 MHz, 3.3 V, LVPECL, 20 ppm stability, -40 to +85 C, Tape & Reel)
Package Outline
Dimensions (mm):
| Dimension | Min | Nom | Max |
|---|---|---|---|
| A | 1.50 | 1.65 | 1.80 |
| b | 1.30 | 1.40 | 1.50 |
| c | 0.50 | 0.60 | 0.70 |
| D | 5.00 BSC | ||
| D1 | 4.30 | 4.40 | 4.50 |
| e | 2.54 BSC | ||
| E | 7.00 BSC | ||
| E1 | 6.10 | 6.20 | 6.30 |
| H | 0.55 | 0.65 | 0.75 |
| L | 1.17 | 1.27 | 1.37 |
| p | 1.80 | 2.60 | |
| R | 0.70 REF | ||
| aaa | 0.15 | ||
| bbb | 0.15 | ||
| ccc | 0.10 | ||
| ddd | 0.10 | ||
| eee | 0.05 | ||
6-Pin PCB Land Pattern
Dimensions (mm):
| Dimension | Min | ||
|---|---|---|---|
| C1 | 4.20 | ||
| E | 2.54 | ||
| X1 | 1.55 | ||
| Y1 | 1.95 |
Notes: Solder mask defined (NSMD) with a minimum clearance of 60 m. Stencil thickness: 0.125 mm (5 mils). Recommended solder paste: No-Clean, Type-3. Reflow profile per JEDEC/IPC J-STD-020.
Mark Specification
| Line | Position | Description |
|---|---|---|
| 1 | 110 | Part Family Number, 53x (x = 5 for Si535, x = 6 for Si536) |
| 2 | 110 | Si535, Si536: Option1 + Option2 + Freq(7) + Temp OR Option1 + Option2 + ConfigNum(6) + Temp for 8-digit resolution |
| 3 | Position 1 | Pin 1 orientation mark (dot) |
| Position 2 | Product Revision (D) | |
| Position 36 | Tiny Trace Code (4 alphanumeric characters) | |
| Position 7 | Year (least significant digit) | |
| Position 89 | Calendar Work Week number (153) | |
| Position 10 | + to indicate Pb-Free and RoHS-compliant |
2411272144_SKYWORKS-536BC000292DGR_C17556827.pdf
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