Product Overview
The Si535/536 is an ultra-low jitter crystal oscillator (XO) from Skyworks Solutions, Inc., utilizing advanced DSPLL circuitry. It offers a wide range of output frequencies from a single fixed crystal, providing exceptional frequency stability and reliability. Its IC-based design and DSPLL clock synthesis ensure superior supply noise rejection, making it ideal for generating low-jitter clocks in noisy communication system environments. The device is factory programmed, reducing lead times associated with custom oscillators. Available in a 5 x 7 mm package with LVPECL and LVDS output options, and 3.3/2.5 V supply options.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL circuitry
- Package: 5 x 7 mm, 6-pad
- Compliance: Pb-free/RoHS-compliant
- Certifications: MIL-STD-883 (for shock, vibration, solderability, leak, solder heat, moisture sensitivity)
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | Selectable parameter specified by part number. |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | Selectable parameter specified by part number. | ||
| Supply Current | IDD | Output enabled LVPECL | 111 | 121 | mA | ||
| Output enabled LVDS | 90 | 98 | mA | ||||
| Tristate mode | 60 | 75 | mA | ||||
| Output Enable (OE) High Input Voltage | VIH | 0.75 x VDD | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Output Enable (OE) Low Input Voltage | VIL | 0.5 | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| Output Frequency Characteristics | fO | LVPECL/LVDS | 100 | 312.5 | MHz | Available frequencies from 100 MHz to 312.5 MHz. | |
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | |||
| Temperature Stability | 7 to +7 ppm | 7 | ppm | Selectable parameter specified by part number. | |||
| 20 to +20 ppm | 20 | ppm | Selectable parameter specified by part number. | ||||
| Aging | fa | Frequency drift over first year | 3 | ppm | |||
| Frequency drift over 20 year life | 10 | ppm | |||||
| Total Stability | Temp stability = 20 ppm | 31.5 | ppm | ||||
| Temp stability = 7 ppm | 20 | ppm | |||||
| Powerup Time | tOSC | TA = 40C to +85C | 10 | ms | Time from powerup or tristate mode to fO. | ||
| Output Levels (LVPECL) | VO | Mid-level | VDD 1.42 | VDD 1.25 | V | 50 to VDD 2.0 V. | |
| Swing (diff) | VOD | 1.1 | 1.9 | VPP | |||
| Swing (Single-ended) | VSE | 0.55 | 0.95 | VPP | |||
| Output Levels (LVDS) | VO | Mid-level | 1.125 | 1.20 | 1.275 | V | Rterm = 100 (differential). |
| Swing (diff) | VOD | 0.5 | 0.7 | 0.9 | VPP | ||
| Rise/Fall time (20/80%) | tR, tF | 350 | ps | ||||
| Symmetry (duty cycle) | SYM | Differential | 45 | 55 | % | ||
| Phase Jitter (RMS) | J | 10 kHz to 1 MHz (data center) | 0.19 | 0.35 | ps | Applies to output frequencies: 156.25 MHz. | |
| 12 kHz to 20 MHz brickwall | 0.25 | 0.40 | ps | Applies to output frequencies: 156.25 MHz. | |||
| Period Jitter (RMS) | JPER | 2 | ps | N = 1000 cycles. | |||
| Peak-to-Peak | 14 | ps | N = 1000 cycles. | ||||
| Thermal Resistance Junction to Ambient | JA | Still Air | 84.6 | C/W | Typical values TA = 25 C, VDD = 3.3 V | ||
| Thermal Resistance Junction to Case | JC | Still Air | 38.8 | C/W | Typical values TA = 25 C, VDD = 3.3 V | ||
| Junction Temperature | TJ | 125 | C | ||||
| Maximum Operating Temperature | TAMAX | 85 | C | ||||
| Storage Temperature | TS | 55 | +125 | C | |||
| ESD Sensitivity (HBM) | ESD | per JESD22-A114 | 2500 | V |
2508281722_SILICON-LABS-535AB000172DGR_C2030265.pdf
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