Product Overview
The Si530/531 XO is a crystal oscillator utilizing Silicon Laboratories' advanced DSPLL circuitry to deliver a low jitter clock at high frequencies. It offers any-rate output frequencies from 10 MHz to 945 MHz, with select frequencies up to 1.4 GHz, using a single fixed crystal for enhanced stability and reliability. This IC-based approach provides superior supply noise rejection, simplifying clock generation in noisy communication environments. The Si530/531 is factory configurable for user specifications including frequency, supply voltage, output format, and temperature stability, eliminating long lead times for custom oscillators.
Product Attributes
- Brand: Silicon Laboratories
- Certifications: Pb-free/RoHS-compliant
- Material: Not specified
- Color: Not specified
- Origin: Not specified
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | Selectable parameter specified by part number. |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | Selectable parameter specified by part number. | ||
| 1.8 V option | 1.71 | 1.8 | 1.89 | V | Selectable parameter specified by part number. | ||
| Absolute Maximum Rating (1.8 V Option) | -0.5 | 1.9 | V | Stresses beyond those listed may cause permanent damage. | |||
| Supply Current | IDD | Output enabled (LVPECL) | 111 | 121 | mA | ||
| Output enabled (CMOS) | 81 | 88 | mA | ||||
| Output Enable (OE) VIH | 0.75 x VDD | V | OE pin includes a 17 k pullup resistor to VDD. | ||||
| Output Enable (OE) VIL | 0.5 | V | OE pin includes a 17 k pullup resistor to VDD. | ||||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| Nominal Frequency | fO | LVPECL/LVDS/CML | 10 | 945 | MHz | Specified at time of order by part number. Also available in frequencies from 970 to 1134 MHz and 1213 to 1417 MHz. | |
| CMOS | 10 | 160 | MHz | Specified at time of order by part number. | |||
| Absolute Maximum Rating (Storage Temperature) | TS | 55 | +125 | C | Stresses beyond those listed may cause permanent damage. | ||
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | |||
| Temperature Stability | 7 | 20 | 50 | ppm | Selectable parameter specified by part number. | ||
| +7 | +20 | +50 | ppm | Selectable parameter specified by part number. | |||
| Total Stability (Temp stability = 7 ppm) | 20 | ppm | |||||
| Aging (Frequency drift over first year) | fa | 3 | ppm | ||||
| Aging (Frequency drift over 20 year life) | fa | 10 | ppm | ||||
| Powerup Time | tOSC | Time from powerup or tristate mode to fO | 10 | ms | |||
| Phase Jitter (RMS) for FOUT > 500 MHz | J | 12 kHz to 20 MHz (OC-48) | 0.25 | 0.40 | ps | Refer to AN256 for further information. | |
| 50 kHz to 80 MHz (OC-192) | 0.26 | 0.37 | ps | Refer to AN256 for further information. | |||
| Phase Jitter (RMS) for FOUT of 125 to 500 MHz | J | 12 kHz to 20 MHz (OC-48) | 0.36 | 0.50 | ps | Refer to AN256 for further information. | |
| 50 kHz to 80 MHz (OC-192) | 0.34 | 0.42 | ps | Refer to AN256 for further information. | |||
| Phase Jitter (RMS) for FOUT of 10 to 160 MHz (CMOS Output Only) | J | 12 kHz to 20 MHz (OC-48) | 0.62 | ps | Refer to AN256 for further information. | ||
| Period Jitter (RMS) | JPER | Any output mode, N = 1000 cycles | 2 | ps | Refer to AN279 for further information. | ||
| Period Jitter (Peak-to-Peak) | JPER | Any output mode, N = 1000 cycles | 14 | ps | Refer to AN279 for further information. | ||
| ESD Sensitivity (HBM, per JESD22-A114) | ESD | 2500 | V | ||||
| Soldering Temperature (Pb-free profile) | TPEAK | 260 | C | Compliant with JEDEC J-STD-020C. | |||
| Soldering Temperature Time @ TPEAK (Pb-free profile) | tP | 20 | 40 | seconds | Compliant with JEDEC J-STD-020C. | ||
2412090938_SILICON-LABS-530FB200M000DG_C1669986.pdf
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