Skyworks Si535/536 ULTRA LOW JITTER CRYSTAL OSCILLATOR (XO)
The Si535/536 XO utilizes Skyworks Solutions advanced DSPLL circuitry to provide an ultra low jitter clock at high-speed differential frequencies. Unlike a traditional XO, where a different crystal is required for each output frequency, the Si535/536 uses one fixed crystal to provide a wide range of output frequencies. This IC based approach allows the crystal resonator to provide exceptional frequency stability and reliability. In addition, DSPLL clock synthesis provides superior supply noise rejection, simplifying the task of generating low jitter clocks in noisy environments typically found in communication systems. The Si535/536 IC based XO is factory programmed at time of shipment, thereby eliminating long lead times associated with custom oscillators.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Certifications: Pb-free/RoHS-compliant
- Material: Gold over Nickel (Contact Pads)
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | 1 |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | 1 | ||
| Supply Current | IDD | Output enabled LVPECL | 111 | 121 | mA | ||
| Output enabled LVDS | 90 | 98 | mA | ||||
| Output Enable (OE) | VIH | 0.75 x VDD | V | 2 | |||
| Output Enable (OE) | VIL | 0.5 | V | 2 | |||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| Nominal Frequency | fO | LVPECL/LVDS | 100 | 312.5 | MHz | 1 | |
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | |||
| Temperature Stability | 7 | +7 | ppm | 1, 2 | |||
| Temperature Stability | 20 | +20 | ppm | 1, 2 | |||
| Aging | fa | Frequency drift over first year | 3 | ppm | |||
| Aging | fa | Frequency drift over 20 year life | 10 | ppm | |||
| Total Stability | Temp stability = 20 ppm | 31.5 | ppm | 2 | |||
| Total Stability | Temp stability = 7 ppm | 20 | ppm | 2 | |||
| Powerup Time | tOSC | TA = 40C to +85C | 10 | ms | 3 | ||
| LVPECL Output Mid-level | VO | 50 to VDD 2.0 V | VDD 1.42 | VDD 1.25 | V | 1 | |
| LVDS Output Mid-level | VO | Rterm = 100 (differential) | 1.125 | 1.20 | 1.275 | V | 2 |
| LVPECL Output Swing (diff) | VOD | 1.1 | 1.9 | VPP | |||
| LVDS Output Swing (diff) | VOD | 0.5 | 0.7 | 0.9 | VPP | ||
| LVPECL Output Swing (Single-ended) | VSE | 0.55 | 0.95 | VPP | |||
| Rise/Fall time (20/80%) | tR, tF | 350 | ps | ||||
| Symmetry (duty cycle) | SYM | Differential | 45 | 55 | % | ||
| Phase Jitter* (RMS) | J | 10 kHz to 1 MHz (data center) | 0.19 | 0.35 | ps | *Applies to output frequencies: 156.25 MHz | |
| 12 kHz to 20 MHz brickwall | 0.25 | 0.40 | ps | *Applies to output frequencies: 156.25 MHz | |||
| Period Jitter* | JPER | RMS | 2 | ps | * N = 1000 cycles | ||
| Peak-to-Peak | 14 | ps | * N = 1000 cycles |
2508281722_SILICON-LABS-536EC150M000DGR_C2029909.pdf
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