Product Overview
The Skyworks Si535/536 is an ultra-low jitter crystal oscillator (XO) utilizing advanced DSPLL circuitry. It provides high-speed differential frequencies from a single fixed crystal, offering exceptional frequency stability and reliability. The IC-based design enhances supply noise rejection, simplifying clock generation in noisy communication environments. Factory programmed at shipment, it eliminates long lead times associated with custom oscillators.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Technology: DSPLL circuitry
- Package: Industry-standard 5 x 7 mm, 6-pad
- Compliance: Pb-free/RoHS-compliant
- Certifications: MIL-STD-883 (Shock, Vibration, Solderability, Leak, Solder Heat), J-STD-020 (Moisture Sensitivity Level MSL1)
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | Selectable parameter specified by part number. |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | Selectable parameter specified by part number. | ||
| Supply Current | IDD | Output enabled (LVPECL) | 111 | 121 | mA | ||
| Output enabled (LVDS) | 90 | 98 | mA | ||||
| Tristate mode Current | IDD | 60 | 75 | mA | |||
| Output Enable (OE) High Input Voltage | VIH | 0.75 x VDD | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Output Enable (OE) Low Input Voltage | VIL | 0.5 | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| Frequency Stability | Total Stability | Temp stability = 20 ppm | 31.5 | ppm | Selectable parameter specified by part number. | ||
| Temp stability = 7 ppm | 20 | ppm | Selectable parameter specified by part number. | ||||
| Aging (20 year life) | fa | 10 | ppm | ||||
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | |||
| Powerup Time | tOSC | TA = 40C to +85C | 10 | ms | Time from powerup or tristate mode to fO. | ||
| LVPECL Output Levels | VO | Mid-level | VDD 1.42 | VDD 1.25 | V | 50 to VDD 2.0 V. | |
| Swing (diff) | 1.1 | 1.9 | VPP | 50 to VDD 2.0 V. | |||
| LVDS Output Levels | VO | Mid-level | 1.125 | 1.20 | 1.275 | V | Rterm = 100 (differential). |
| Swing (diff) | 0.5 | 0.7 | 0.9 | VPP | Rterm = 100 (differential). | ||
| Rise/Fall time | tR, tF | 350 | ps | ||||
| Symmetry (duty cycle) | SYM | Differential | 45 | 55 | % | ||
| Phase Jitter (RMS) | J | 10 kHz to 1 MHz (data center) | 0.19 | 0.35 | ps | Applies to output frequencies: 156.25 MHz. | |
| Phase Jitter (RMS) | J | 12 kHz to 20 MHz brickwall | 0.25 | 0.40 | ps | Applies to output frequencies: 156.25 MHz. | |
| Period Jitter (RMS) | JPER | N = 1000 cycles | 2 | ps | |||
| Period Jitter (Peak-to-Peak) | JPER | N = 1000 cycles | 14 | ps | |||
| Thermal Resistance (Junction to Ambient) | JA | Still Air | 84.6 | C/W | Typical values TA = 25 C, VDD = 3.3 V | ||
| Thermal Resistance (Junction to Case) | JC | Still Air | 38.8 | C/W | Typical values TA = 25 C, VDD = 3.3 V |
2508281722_SILICON-LABS-535AC000172DGR_C2030234.pdf
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