Si535/536 ULTRA LOW JITTER CRYSTAL OSCILLATOR (XO)
The Si535/536 XO utilizes Skyworks Solutions advanced DSPLL circuitry to provide an ultra low jitter clock at high-speed differential frequencies. Unlike a traditional XO, where a different crystal is required for each output frequency, the Si535/536 uses one fixed crystal to provide a wide range of output frequencies. This IC based approach allows the crystal resonator to provide exceptional frequency stability and reliability. In addition, DSPLL clock synthesis provides superior supply noise rejection, simplifying the task of generating low jitter clocks in noisy environments typically found in communication systems. The Si535/536 IC based XO is factory programmed at time of shipment, thereby eliminating long lead times associated with custom oscillators.
Features
- Available with select frequencies from 100 MHz to 312.5 MHz
- 3rd generation DSPLL with superior jitter performance and high-power supply noise rejection
- 3x better frequency stability than SAW-based oscillators
- Available with LVPECL and LVDS outputs
- 3.3 and 2.5 V supply options
- Industry-standard 5 x 7 mm package and pinout
- Pb-free/RoHS-compliant
Applications
- 10/40/100G data centers
- 10G Ethernet switches/routers
- Fibre channel/SAS/storage
- Enterprise servers
- Networking
- Telecommunications
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Certifications: Pb-free/RoHS-compliant
- Material: Not specified
- Color: Not specified
- Origin: Not specified
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
| Supply Voltage | VDD | 3.3 V option | 2.97 | 3.3 | 3.63 | V | Selectable parameter specified by part number. |
| 2.5 V option | 2.25 | 2.5 | 2.75 | V | Selectable parameter specified by part number. | ||
| Supply Current | IDD | Output enabled LVPECL | 111 | 121 | mA | ||
| Output enabled LVDS | 90 | 98 | mA | ||||
| Tristate mode | IDD | 60 | 75 | mA | |||
| Output Enable (OE) | VIH/VIL | VIH | 0.75 x VDD | V | OE pin includes a 17 k pullup resistor to VDD. | ||
| VIL | 0.5 | V | OE pin includes a 17 k pullup resistor to VDD. | ||||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| Output Frequency Characteristics | fO | Nominal Frequency LVPECL/LVDS | 100 | 312.5 | MHz | See Section 3. "Ordering Information" on page 7 for the list of available frequencies. | |
| Initial Accuracy | 1.5 | ppm | Measured at +25 C at time of shipping | ||||
| Temperature Stability | 7/+7 | +20/-20 | ppm | Selectable parameter specified by part number. | |||
| Aging (Frequency drift over 20 year life) | 10 | ppm | |||||
| Powerup Time | tOSC | TA = 40C to +85C | 10 | ms | Time from powerup or tristate mode to fO. | ||
| LVPECL Output Levels | VO | Mid-level | VDD 1.42 | VDD 1.25 | V | 50 to VDD 2.0 V. | |
| Swing (diff) | 1.1 | 1.9 | VPP | ||||
| LVDS Output Levels | VO | Mid-level | 1.125 | 1.20 | 1.275 | V | Rterm = 100 (differential). |
| Swing (diff) | 0.5 | 0.7 | 0.9 | VPP | |||
| Rise/Fall time | tR, tF | 350 | ps | ||||
| Symmetry (duty cycle) | SYM | Differential | 45 | 55 | % | ||
| Phase Jitter (RMS) | J | 10 kHz to 1 MHz (data center) | 0.19 | 0.35 | ps | Applies to output frequencies: 156.25 MHz. | |
| 12 kHz to 20 MHz brickwall | 0.25 | 0.40 | ps | Applies to output frequencies: 156.25 MHz. | |||
| Period Jitter (RMS) | JPER | N = 1000 cycles | 2 | ps | |||
| Peak-to-Peak | 14 | ps | N = 1000 cycles. | ||||
| Thermal Resistance Junction to Ambient | JA | Still Air | 84.6 | C/W | TA = 25 C, VDD = 3.3 V | ||
| Thermal Resistance Junction to Case | JC | Still Air | 38.8 | C/W | TA = 25 C, VDD = 3.3 V | ||
| Ambient Temperature | TA | 40 | 85 | C | |||
| Junction Temperature | TJ | 125 | C | ||||
| Maximum Operating Temperature | TAMAX | 85 | C | ||||
| Supply Voltage, 2.5/3.3 V Option | VDD | 0.5 | 3.8 | V | |||
| Input Voltage (any input pin) | VI | 0.5 | VDD + 0.3 | V | |||
| Storage Temperature | TS | 55 | 125 | C | |||
| ESD Sensitivity (HBM, per JESD22-A114) | ESD | 2500 | V | ||||
| Soldering Temperature (Pb-free profile) | TPEAK | 260 | C | The device is compliant with JEDEC J-STD-020C. | |||
| Soldering Temperature Time @ TPEAK (Pb-free profile) | tP | 20 | 40 | seconds | The device is compliant with JEDEC J-STD-020C. |
2508281722_SILICON-LABS-535AB150M000DGR_C2030274.pdf
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