Product Overview
The Si535/536 XO utilizes Skyworks Solutions advanced DSPLL circuitry to provide an ultra low jitter clock at high-speed differential frequencies. Unlike traditional XOs, it uses one fixed crystal for a wide range of output frequencies, offering exceptional frequency stability and reliability. This IC-based approach provides superior supply noise rejection, simplifying clock generation in noisy communication system environments. The Si535/536 is factory programmed, eliminating long lead times associated with custom oscillators. It is available with select frequencies from 100 MHz to 312.5 MHz, 3rd generation DSPLL for superior jitter performance and high-power supply noise rejection, 3x better frequency stability than SAW-based oscillators, LVPECL and LVDS outputs, 3.3 and 2.5 V supply options, and an industry-standard 5 x 7 mm package. Applications include 10/40/100G data centers, 10G Ethernet switches/routers, Fibre channel/SAS/storage, enterprise servers, networking, and telecommunications.
Product Attributes
- Brand: Skyworks Solutions, Inc.
- Certifications: Pb-free/RoHS-compliant
- Material: Gold over Nickel contact pads
Technical Specifications
| Parameter | Symbol | Test Condition | Min | Typ | Max | Unit | Notes |
|---|---|---|---|---|---|---|---|
| Recommended Operating Conditions | |||||||
| Supply Voltage (3.3 V option) | VDD | 2.97 | 3.3 | 3.63 | V | Selectable parameter specified by part number. | |
| Supply Voltage (2.5 V option) | VDD | 2.25 | 2.5 | 2.75 | V | Selectable parameter specified by part number. | |
| Supply Current (Output enabled, LVPECL) | IDD | 111 | 121 | mA | |||
| Supply Current (Output enabled, LVDS) | IDD | 90 | 98 | mA | |||
| Supply Current (Tristate mode) | IDD | 60 | 75 | mA | |||
| Output Enable (OE) High Input Voltage | VIH | 0.75 x VDD | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Output Enable (OE) Low Input Voltage | VIL | 0.5 | V | OE pin includes a 17 k pullup resistor to VDD. | |||
| Operating Temperature Range | TA | 40 | 85 | C | |||
| CLK Output Frequency Characteristics | |||||||
| Nominal Frequency | fO | LVPECL/LVDS | 100 | 312.5 | MHz | See Section 3. "Ordering Information" for available frequencies. | |
| Initial Accuracy | fi | Measured at +25 C at time of shipping | 1.5 | ppm | |||
| Temperature Stability (20 ppm option) | 20 | +20 | ppm | Selectable parameter specified by part number. | |||
| Temperature Stability (7 ppm option) | 7 | +7 | ppm | Selectable parameter specified by part number. | |||
| Aging (1st year) | fa | Frequency drift over first year | 3 | ppm | |||
| Aging (20 year life) | fa | Frequency drift over 20 year life | 10 | ppm | |||
| Total Stability (Temp stability = 20 ppm) | 31.5 | ppm | |||||
| Total Stability (Temp stability = 7 ppm) | 20 | ppm | |||||
| Powerup Time | tOSC | TA = 40C to +85C | 10 | ms | Time from powerup or tristate mode to fO. | ||
| CLK Output Levels and Symmetry | |||||||
| LVPECL Output Mid-level | VO | VDD 1.42 | VDD 1.25 | V | 50 to VDD 2.0 V. | ||
| LVPECL Output Swing (Differential) | VOD | 1.1 | 1.9 | VPP | |||
| LVPECL Output Swing (Single-ended) | VSE | 0.55 | 0.95 | VPP | |||
| LVDS Output Mid-level | VO | 1.125 | 1.20 | 1.275 | V | Rterm = 100 (differential). | |
| LVDS Output Swing (Differential) | VOD | 0.5 | 0.7 | 0.9 | VPP | Rterm = 100 (differential). | |
| LVDS Rise/Fall time (20/80%) | tR, tF | 350 | ps | ||||
| Symmetry (duty cycle) (Differential) | SYM | 45 | 55 | % | |||
| CLK Output Phase Jitter | |||||||
| Phase Jitter (RMS) | J | 10 kHz to 1 MHz (data center) | 0.19 | 0.35 | ps | Applies to output frequencies: 156.25 MHz. | |
| Phase Jitter (RMS) | J | 12 kHz to 20 MHz brickwall | 0.25 | 0.40 | ps | Applies to output frequencies: 156.25 MHz. | |
| CLK Output Period Jitter | |||||||
| Period Jitter (RMS) | JPER | N = 1000 cycles | 2 | ps | |||
| Period Jitter (Peak-to-Peak) | JPER | N = 1000 cycles | 14 | ps | |||
| Environmental Compliance | |||||||
| Mechanical Shock | MIL-STD-883, Method 2002 | ||||||
| Mechanical Vibration | MIL-STD-883, Method 2007 | ||||||
| Solderability | MIL-STD-883, Method 2003 | ||||||
| Gross & Fine Leak | MIL-STD-883, Method 1014 | ||||||
| Resistance to Solder Heat | MIL-STD-883, Method 2036 | ||||||
| Moisture Sensitivity Level | J-STD-020, MSL1 | ||||||
| Thermal Characteristics (Typical values TA = 25 C, VDD = 3.3 V) | |||||||
| Thermal Resistance Junction to Ambient | JA | Still Air | 84.6 | C/W | |||
| Thermal Resistance Junction to Case | JC | Still Air | 38.8 | C/W | |||
| Ambient Temperature | TA | 40 | 85 | C | |||
| Junction Temperature | TJ | 125 | C | ||||
| Absolute Maximum Ratings | |||||||
| Maximum Operating Temperature | TAMAX | 85 | C | Stresses beyond those listed may cause permanent damage. | |||
| Supply Voltage, 2.5/3.3 V Option | VDD | 0.5 | 3.8 | V | Stresses beyond those listed may cause permanent damage. | ||
| Input Voltage (any input pin) | VI | 0.5 | VDD + 0.3 | V | Stresses beyond those listed may cause permanent damage. | ||
| Storage Temperature | TS | 55 | 125 | C | Stresses beyond those listed may cause permanent damage. | ||
| ESD Sensitivity (HBM, per JESD22-A114) | ESD | 2500 | V | ||||
| Soldering Temperature (Pb-free profile) | TPEAK | 260 | C | Compliant with JEDEC J-STD-020C. | |||
| Soldering Temperature Time @ TPEAK (Pb-free profile) | tP | 20 | 40 | seconds | Compliant with JEDEC J-STD-020C. | ||
2508281722_SILICON-LABS-536EB000172DGR_C2031853.pdf
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