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quality 7 by 5 millimeter XO oscillator ABRACON AK7DBF1-1000000T2 ultra low jitter frequency 100 megahertz factory
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quality 7 by 5 millimeter XO oscillator ABRACON AK7DBF1-1000000T2 ultra low jitter frequency 100 megahertz factory
quality 7 by 5 millimeter XO oscillator ABRACON AK7DBF1-1000000T2 ultra low jitter frequency 100 megahertz factory
quality 7 by 5 millimeter XO oscillator ABRACON AK7DBF1-1000000T2 ultra low jitter frequency 100 megahertz factory
>
Specifications
Voltage - Supply:
2.5V
Operating Temperature:
-40℃~+85℃
Frequency:
100MHz
Mfr. Part #:
AK7DBF1-100.0000T2
Model Number:
AK7DBF1-100.0000T2
Package:
SMD7050-6P
Key Attributes
Product Description

Product Overview

The ClearClock AK7 series is an ultra-low jitter, 7.0 x 5.0mm XO oscillator designed for high-performance applications. It offers a frequency range from 100MHz to 220MHz with exceptional stability options of 20ppm and 25ppm over a -40C to +85C temperature range. Featuring lowest-in-class power consumption, this oscillator supports LVPECL, LVDS, and HCSL differential output types and a wide range of supply voltages (3.3V, 2.5V, 1.8V). Its ultra-low jitter of 75 fs typ RMS makes it ideal for demanding applications in networking, communications, datacenter, and test & measurement sectors.

Product Attributes

  • Brand: ClearClock
  • Manufacturer: ABRACON LLC
  • Certifications: ISO9001-2015 Certified, RoHS/RoHS II Compliant
  • Package Type: 7.0 x 5.0mm XO
  • MSL Rating: 1
  • Sensitivity: ESD Sensitive

Technical Specifications

Parameter Specification Unit Notes
Product Series AK7
Package Dimensions 7.0 x 5.0 x 1.8 mm mm
Frequency Range 100 - 220 MHz
Standard Available Frequencies 100, 122.88, 125, 148.5, 156.25, 200, 212.5 MHz Contact Abracon for availability of frequencies not listed
Supply Voltage (Vdd) 3.3V (Option A), 2.5V (Option B), 1.8V (Option C) V Note 2: 1.8V option not available with LVPECL output
Supply Current (Idd) LVPECL: 30-50, LVDS: 16-27, HCSL: 17-30 mA @ 220MHz; @ Vdd = 3.3V
Operating Temperature Range -20 to +70 (Option D), -40 to +85 (Option F or Q) C
Storage Temperature -55 to +150 C
Frequency Accuracy (Initial Set-Tolerance) 5 ppm Note 3: Relative to carrier frequency @ +25C (Pre-Reflow)
Frequency Stability over Operating Temperature Range 15 (Option D), 20 (Option Q), 25 (Option F) ppm Note 4: Option Q only available in select frequencies
Aging over 20 Year Product Life 15 ppm Note 5
All-Inclusive Frequency Accuracy (Total Stability) 40 (Option D), 45 (Option Q), 50 (Option F) ppm Note 5, 6: Over 20 Year Product Life
Rise (Tr) / Fall (Tf) Time (20% to 80% Vpeak to peak) LVPECL: 0.2-0.4 ns (3.3V), 0.3-0.6 ns (2.5V); LVDS: 0.15-0.4 ns (3.3V/2.5V), 0.3-0.5 ns (1.8V); HCSL: 0.3-0.5 ns (3.3V/2.5V), 0.3-0.6 ns (1.8V) ns
Duty Cycle 45 - 55 %
Start-up Time < 2 / 5.0 ms Note 3
Differential Output High Voltage (VOH) LVPECL: Vdd-1.03 to Vdd-0.88; LVDS: 1.40-1.60; HCSL: 0.40-0.85 V RL=50 or 100
Differential Output Low Voltage (VOL) LVPECL: Vdd-1.85 to Vdd-1.60; LVDS: 0.90-1.10; HCSL: -0.15 to 0.15 V RL=50 or 100
Output Voltage Swing LVPECL: 0.25-0.45, LVDS: 0.595-0.93, HCSL: 0.620-0.78 V
Output Enable & Disable Control Enable: 0.7*(Vdd), Disable: 0.3*(Vdd) V
Output Enable Time < 1 / 5.0 ms
Output Disable Time < 0.2 s
Output Disable Current Consumption < 10 A OE 0.3V
RMS Phase Jitter (12kHz-20MHz BW) @ +25C See table below fsec Note 7, 8, 9

RMS Phase Jitter (12kHz-20MHz BW) @ +25C

Frequency Output Type Vdd Min Typ Max Unit
200 MHz LVPECL 3.3V - 70 95 fsec
200 MHz LVPECL 2.5V - 80 105 fsec
200 MHz LVDS 3.3V - 125 150 fsec
200 MHz LVDS 2.5V - 150 175 fsec
200 MHz HCSL 3.3V - 120 145 fsec
200 MHz HCSL 2.5V - 135 160 fsec
156.25 MHz LVPECL 3.3V - 75 100 fsec
156.25 MHz LVPECL 2.5V - 80 105 fsec
156.25 MHz LVDS 3.3V - 90 115 fsec
156.25 MHz LVDS 2.5V - 80 105 fsec
156.25 MHz HCSL 3.3V - 110 135 fsec
156.25 MHz HCSL 2.5V - 115 140 fsec
148.5 MHz LVPECL 3.3V - 115 140 fsec
148.5 MHz LVPECL 2.5V - 95 120 fsec
148.5 MHz LVDS 3.3V - 125 150 fsec
148.5 MHz LVDS 2.5V - 120 145 fsec
148.5 MHz HCSL 3.3V - 130 155 fsec
148.5 MHz HCSL 2.5V - 135 160 fsec
148.5 MHz HCSL 1.8V - 115 140 fsec
125 MHz LVPECL 3.3V - 100 125 fsec
125 MHz LVPECL 2.5V - 100 125 fsec
125 MHz LVDS 3.3V - 150 175 fsec
125 MHz LVDS 2.5V - 110 135 fsec
125 MHz LVDS 1.8V - 140 165 fsec
125 MHz HCSL 3.3V - 135 160 fsec
125 MHz HCSL 2.5V - 140 165 fsec
125 MHz HCSL 1.8V - 135 160 fsec
122.88 MHz LVPECL 3.3V - 150 175 fsec
122.88 MHz LVPECL 2.5V - 155 180 fsec
122.88 MHz LVDS 3.3V - 130 155 fsec
122.88 MHz LVDS 2.5V - 115 140 fsec
122.88 MHz LVDS 1.8V - 165 190 fsec
122.88 MHz HCSL 3.3V - 135 160 fsec
122.88 MHz HCSL 2.5V - 140 165 fsec
122.88 MHz HCSL 1.8V - 125 150 fsec
100 MHz LVDS 2.5V - 155 180 fsec
100 MHz HCSL 3.3V - 145 170 fsec
100 MHz HCSL 2.5V - 120 145 fsec
100 MHz HCSL 1.8V - 155 180 fsec

Applications

  • Networking & communications
  • Gigabit Ethernet
  • Fibre Channel
  • SONET/SDH
  • RF systems, base stations (BTS)
  • Datacenter
  • PCI Express
  • Test & measurement

Features

  • Ultra-Low jitter: 75 fs typ RMS (100fs MAX, F= 156.25MHz LVPECL); spurs included
  • Lowest in-class power consumption (16mA Typ LVDS)
  • 20ppm & 25ppm stability (-40 to +85C) options available (dependent on frequency)
  • 3.3V, 2.5V, 1.8V Vdd supply
  • LVPECL, LVDS, & HCSL differential output options
  • Output enable standard
  • 3rd overtone solution

Part Number Identification

AK7 (1)(2)(3)(4)(5)(6)

  • (1) Output: P=LVPECL, D=LVDS, H=HCSL
  • (2) Vdd: A=3.3V, B=2.5V, C=1.8V
  • (3) Stability over OTR: D=15ppm (-20C to +70C), Q=20ppm (-40C to +85C), F=25 ppm (-40C to +85C)
  • (4) OE Function: 1=OE Pin 1; Active High, 3=OE Pin 2; Active High
  • (5) Output Frequency: Specify in MHz up to 4 digit accuracy after the decimal (e.g., 156.2500)
  • (6) Packaging: Blank=Bulk (MOQ: 50 units), T2=Tape & Reel (250 units), T=Tape & Reel (1,000 units)

Packaging Options

  • Bulk (MOQ = 50 units)
  • T2 = Tape & Reel (250 units/reel)
  • T = Tape & Reel (1,000 units/reel)

Mechanical Dimensions

7.0 x 5.0 mm

Pin Description

Pin # Case 1 (OE Pin 1) Case 2 (OE Pin 2)
1 Output Enable (Logic High) / Disable (Logic Low) No Connect
2 No Connect Output Enable (Logic High) / Disable (Logic Low)
3 GND GND
4 Output Output
5 Complementary output Complementary output
6 Supply Voltage (Vdd) Supply Voltage (Vdd)

Important Notes

  • Note 1: Contact Abracon for non-standard part number configurations and/or requests with carrier frequency callouts up to 5 & 6 digit accuracy after the decimal.
  • Note 2: Supply Voltage (Vdd) = 1.8V option not available with LVPECL output.
  • Note 3: Relative to initial measured frequency @ +25C.
  • Note 4: Option Q only available in select frequencies. Please contact Abracon for availability.
  • Note 5: Relative to post-reflow frequency.
  • Note 6: Includes temperature stability, initial frequency accuracy, load pulling, power supply variation, and 20-year aging.
  • Note 7: Guaranteed by characterization; RMS Phase Jitter specifications are inclusive of any spurs.
  • Note 8: Phase jitter measured with Keysight E5052B Signal Source Analyzer.
  • Note 9: Refer to the next section for phase noise test setup and representative phase noise plots.
  • Note 10: Contact Abracon for phase noise plots at alternative supply voltage (Vdd) & differential output formats.
  • Note 11: Recommended test circuit images are representative of when the OE Function is located on Pin 1; when the OE Function is located on Pin 2, then Pin 1=No Connect & Pin 2=OE or No Connect.
  • Note 12: Can withstand: 2 reflows.
  • Note 13: Ramp Up Rate (TL TP) = 3C / sec. MAX.
  • Note 14: Ramp Down Rate (TP TL) = 6C / sec. MAX.
  • Note 15: Time 25C to Peak Temperature (25C TP) = 8 minutes MAX.

Company Information

LLC ABRACON IS ISO9001-2015 CERTIFIED

5101 Hidden Creek Ln Spicewood TX 78669

Phone: 512-371-6159 | Fax: 512-351-8858

For terms and conditions of sales, please visit: www.abracon.com

REVISED: 04.15.2019


2410121800_ABRACON-AK7DBF1-100-0000T2_C1987747.pdf

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